4 Bit Shift Register
A shift register (serial-in parallel-out type) consists of a group of flip-flops arranged such that the output of one feeds the input of the next so that the binary numbers stored shift from one flip-flop to the next controlled by a clock pulse. This implementation is a 4-bit shift register utilising d-type flip-flops. In this type of circuit, the clock inputs of all the flip-flops connect to a common line, so they receive clock inputs simultaneously. With a d-type flip-flop, the value at the input D transfers to the output Q on the rising edge of every clock pulse. Since they all receive the clock pulse simultaneously, they all do this operation together on the rising edge.
This type of shift register is also known as serial in parallel out register because we load it through its serial input; however, we read it from its parallel output. This type of register is also the basis of a serial to parallel converter and is therefore sometimes used in serial communication systems.
In these types of circuits, we reset the flip-flops simultaneously and therefore their control pins connects to a common line.
Shift Register Truth Table
| Outputs | Q0 | Q1 | Q2 | Q3 |
| Reset | 0 | 0 | 0 | 0 |
| CK Pulse 1 | 1 | 0 | 0 | 0 |
| CK Pulse 2 | 0 | 1 | 0 | 0 |
| CK Pulse 3 | 0 | 0 | 1 | 0 |
| CK Pulse 4 | 0 | 0 | 0 | 1 |
This truth table shows the outputs at successive clock pulses if we were to load the register with binary 0 0 0 1 through the serial input. If you click on the header image at the top of the page, we have an animation of this circuit that might be useful.