RAD750 Processor Architecture

The RAD750 has a super-scalar architecture allowing it to execute three instructions per single clock cycle. It can execute multiple instructions in parallel. Pipelining instructions in this way yields rapid execution times, providing a high throughput. It was the earliest processor to feature dynamic power management that selectively activated internal circuits as and when needed. It has three power-save modes, doze, nap, and sleep.

The bus interface and architecture are flexible providing a 64-bit data bus and a 32-bit address bus. There is also support for burst, split, and pipelined transactions.

This processor might be old but it is lean and sure packs a punch when compared to the modern day power-hungry transistor-bloated architectures. Combined with highly optimised assembly language code, it can certainly hold its own ground.

This Article Continues...