Serial to Parallel Converter - 4-bit Shift Register

A serial to parallel converter is a digital circuit where we feed the input data serially, and read the outputs in parallel fashion. A 4-bit serial-to-parallel shift register is one of the simplest types of circuits utilising four D-type flip-flops. Shift registers are widely in use in modern digital electronics. Data communications from a USB port or a SATA hard disk drive are in serial, and there is usually a controller IC that converts this data into parallel before sending to the microprocessor.

It is important to understand that the D-type flip-flop is a rising edge triggered device, and the data at its input transfers to the output only on the rising edge of the clock pulse.

It is customary to tie the RESET control signals together so that a single command logic performs this function simultaneously on all stages.

There is only one clock source and all the flip-flops receive the same clock pulse, therefore we tie them to a single line as well.

A test implementation of this circuit could be through using the 4013 IC, which has dual D-type flip-flops; therefore two of these ICs would be required to implement a 4-bit serial to parallel shift register.

Timing Diagram

As you can see, the output from the previous stage feeds the input of the next stage, however data at the input transfers to the output only on the rising edge of the clock pulse. On the falling edge, the data remains latched because it remembers!

The trick to understanding this timing diagram is to understand that change in state occurs only at the rising edge of the clock pulse. The rising edge has the red colour line to make it easy to identify. On the falling edge, nothing happens and the data remains locked. The logic 1 data passes through each stage on the rising edge of each clock cycle.

Another thing to note is that the input data is a single logic 1 pulse followed by logic 0 state; therefore each output from successive stages will show a logic 1 state for one clock cycle and then flat-line continuously, because in essence we are storing 0-0-0-1 in the shift register.