D Type Flip Flop Truth Table

The SECRET to Understanding How D Type Flip Flop Works

The logic level present at input "D" transfers to output "Q" only during the positive-going transition of the clock pulse "CK".

A positive going transition is when the clock pulse "CK" goes from logic 0 to logic 1. Depending upon the circuit, this could be 0 V to 9 V, or 0 V to +5 V, or put in another way, from low to high. As a GCSE Jedi, you must remember this because your life could depend upon it. Remembering is not enough though. You must understand it, feel it, and become one with it. :-)

Let us for the time being ignore the SET and RESET pin functions, assuming they are unconnected and therefore at logic 0 state. When you switch ON the IC chip for the first time, assuming there is no input (logic 0) at "D", and there is no clock pulse CK=0, then the output "Q" will be logic 0, and the other output "/Q" will be logic 1.

Assume that you now apply logic 1 at the input "D". In the circuit, this means that there is a high state at the input pin "D", then what happens to the output Q? Well, it remains at logic 0, because we have not yet applied a clock pulse "CK"!

Assume now that we apply a clock pulse at pin "CK". As the boffins say, it has to be a positive-going transition from logic 0 to logic 1.

As soon as the clock pulse is applied, the logic 1 at input pin "D" magically transfers to the output pin "Q", and therefore "Q" becomes logic 1 as well.

All that this fuss and bother did was to transfer logic 1 at the input "D" to the output "Q". However, hold on to your hats, because this is not all that it can do. It can also transfer logic 0 at the input to output as well! Of course, you will need to apply a clock pulse just as before!

Although we use the term transfer to explain what is happening, the logic 1 state at the input "D" remains, and what really happens is that the output "Q" copies the state of the input "D".

So perhaps a simpler explanation of this device is that the output pin "Q" copies the state of the input pin "D" when the clock pulse goes from low to high. D'oh!

The animation above shows this simple part of the function, which I hope will be useful for GCSE students. As you can see from this, the clock signal "CK" determines when the change in state occurs, because without a clock pulse, the output "Q" will not change.

Nuclear Missile Silo - 80s TTL

One day you will become a boffin stuck in an underground nuclear missile silo upgrading the old 80s TTL technology. Looking at timing diagrams, you would see that a change in state at the input "D" causes a change in state at the output "Q", during the rising edge of the clock pulse. Sometimes when I am looking at fast changing timing diagrams, I notice that when D goes high, Q goes high, and when D goes low, Q goes low. This happens at the rising edge of a fast changing clock pulse.

Special Memory Features of the Output Q

The logic level at the input "D" transfers to the output "Q" on the positive going transition of the clock signal "CK". So when the clock signal goes from low to high, the logic state at Q is the same as that at D, and the value is said to be stored or loaded. When the clock signal "CK" goes from high back to low again, the output at "Q" becomes locked which Americans often describe as latched. Therefore, the locking action occurs on the negative-going transition of the clock pulse. Therefore, this little device behaves as a memory by storing 1-bit on a clock transition.

Let us look at it another way, providing there are no clock transitions, and CK remains at logic 0, then the logic state of the output "Q" remains fixed even when the input state changes rapidly between logic 1 and logic 0. If the output "Q" were to be logic 1, then it would remain so even if the input "D" were to revert to logic 0, therefore it possesses the qualities of being a memory. This is a very important aspect to understand.

Once the output is locked, there are two possible ways to change the state of the output Q back to logic 0. One possible way is to set logic 0 at the input D, and feed another positive-going transition clock pulse. The other way is to set logic 1 at the RESET pin. Remember, that the reset pin overrides the input "D" and clock "CK", and returns "Q" to logic 0.

Memory Register (8-bits to a Byte)

As you can see, if you can store 1-bit using a single D-type flip-flop, then all you need are eight of these connected to a common clock signal. Then suddenly, you have a register, which can store a byte long binary number. A register is usually used in processors for the temporary storage of a binary number.

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